RISC-V Atom Logo

Overview

  • Introduction
  • Directory Structure

Getting Started

  • Prerequisites
  • Building RISC-V Atom
  • RISC-V Atom Development in Docker
  • Running Examples on AtomSim

Documentation & User Manual

  • RISC-V Atom CPU
  • SoC Targets
  • Memory Map and Boot Flow
  • RISC-V Atom Bootloader
  • AtomSim: A simulation tool for Atom based SoCs
  • SCAR: Search Compile Assert Run
  • ConvELF: A Utility Tool for ELF Conversion
  • Libcatom: C standard library for RISC-V Atom
  • RISC-V Atom Build Flow
  • Performance Statistics
  • FPGA Implementation Results
RISC-V Atom
  • RISC-V Atom Documentation & User Manual
  • View page source

_images/rvatom-header.png

RISC-V Atom Documentation & User Manual

Welcome to RISC-V Atom Documentation and User Manual! Please follow the getting started guide to setup an environment to build and test the RISC-V Atom project. Please feel free file a bug report in github.

Github Repository
https://github.com/saursin/riscv-atom
Website
https://sites.google.com/view/saursin/projects/risc-v-atom?authuser=0

Overview

  • Introduction
  • Directory Structure

Getting Started

  • Prerequisites
  • Building RISC-V Atom
  • RISC-V Atom Development in Docker
  • Running Examples on AtomSim

Documentation & User Manual

  • RISC-V Atom CPU
  • SoC Targets
  • Memory Map and Boot Flow
  • RISC-V Atom Bootloader
  • AtomSim: A simulation tool for Atom based SoCs
  • SCAR: Search Compile Assert Run
  • ConvELF: A Utility Tool for ELF Conversion
  • Libcatom: C standard library for RISC-V Atom
  • RISC-V Atom Build Flow
  • Performance Statistics
  • FPGA Implementation Results

Indices and tables

  • Index

  • Module Index

  • Search Page

Next

© Copyright 2021, Saurabh Singh.

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