AtomSim: A simulation tool for Atom based SoCs

AtomSim is an interactive RTL simulator for Atom based SoCs. It provides an interface which is similar to the RISC-V Spike simulator, but simulates the actual RTL in the backend. Atomsim is a modular and flexible simulaion solution based on Verilator, due to which it can achieve a very high simulation rate. AtomSim is a feature rich tool which makes it very powerful for debugging code on the Atom CPU.

Key Features of AtomSim are listed below:

  1. Achieves a high simulation rate due to use of Verilator.

  2. Target Configurable, can be easily extended for new SoC designs.

  3. In-built debug mode similar to spike.

  4. External Debug Support using OpenOCD & GDB [TODO].

  5. Supports VCD trace generation.

  6. Supports memory dumps.

  7. Compatible with RISC-V compliance tests framework.

  8. Compatible with SCAR framework.

The following figure depicts the architecture of atomsim.


See Building RISC-V Atom for info on how to build atomsim.

To view available command line options, use:

$ atomsim --help

Modes of Operation

Atomsim supports two modes of operation:

AtomSim Topics